Clocked Gate Reduction With Clockless Gates in Technology Mapping for RSFQ Logic Circuits
Nobutaka Kito, Kazuyoshi Takagi, and Naofumi Takagi
IEEE Transactions on Applied Superconductivity, 35, 5, 1300605, 1300605, 2025, refereed, Joint Work
Automatic Cell Placement for Josephson Transmission Lines in a Cell-Based Layout Design Environment for RSFQ Circuits
Nobutaka Kito
Journal of Physics: Conference Series, 012008, 012008, 2024, refereed, Single Work
Technology Mapping With Clockless Gates for Logic Stage Reduction of RSFQ Logic Circuits
Nobutaka Kito, Takahiro Kawaguchi, Kazuyoshi Takagi, and Naofumi Takagi
IEEE Transactions on Applied Superconductivity, 33, 5, 1302105, 1302105, 2023, refereed, Joint Work
Accuracy Improvement of Polynomial Computing RSFQ Circuits Based on Stochastic Computing by Partial Duplication
Moeka Tsuji, Nobutaka Kito
Journal of Physics: Conference Series, 012023, 012023, 2023, refereed, Joint Work
Compact Stochastic Computing Circuits Using the Latching Function of RSFQ Circuits for Computing Polynomials
Koki Wada, Nobutaka Kito
Journal of Physics: Conference Series, 012032, 012032, 2022, refereed, Joint Work
Logic-Depth-Aware Technology Mapping Method for RSFQ Logic Circuits With Special RSFQ Gates
Nobutaka Kito, Kazuyoshi Takagi, Naofumi Takagi
IEEE Transactions on Applied Superconductivity, 1300105, 1300105, 2022, refereed, Joint Work
A Timing Fault Model and an Efficient Timing Fault Simulation Method for Rapid Single-Flux-Quantum Logic Circuits
Shogo Nakamura, Kazuyoshi Takagi, Nobutaka Kito, Naofumi Takagi
Journal of Physics: Conference Series, 1, 8, 2021, refereed, Joint Work
An RSFQ flexible-precision multiplier utilizing bit-level processing
Nobutaka Kito, Kazuyoshi Takagi
Journal of Physics: Conference Series, 1, 8, 2021, refereed, Joint Work
Conversion Method of Netlists Consisting of Conventional Logic Gates to RSFQ Logic Circuits Utilizing Special RSFQ Gates
Nobutaka Kito, Kazuyoshi Takagi, and Naofumi Takagi
IEEE Transactions on Applied Superconductivity, IEEE, 30, 7, 1302306, 1302306, 2020, refereed, Joint Work
Logic Simulation Tool for RSFQ Circuits Accepting Arrivals of Multiple Pulses in a Clock Period
Nobutaka Kito, Shohei Udatsu, and Kazuyoshi Takagi
Journal of Physics: Conference Series, 012041, 012041, 2020, refereed, Joint Work
Conversion of Logic Gates in Netlists for Rapid Single Flux Quantum Circuits Utilizing Confluence of Pulses
Nobutaka Kito, Kazuyoshi Takagi, and Naofumi Takagi
IPSJ Transactions on System LSI Design Methodology, IPSJ, 12, 78, 80, 2019, refereed, Joint Work
Concurrent Error Detectable Carry Select Adder with Easy Testability
Nobutaka Kito and Naofumi Takagi
IEEE Transactions on Computers, IEEE, 68, 7, 1105, 1110, 2019, refereed, Joint Work, DOI: 10.1109/TC.2019.2895074
Rapid Single-Flux-Quantum Truncated Multiplier Based on Bit-Level Processing
Nobutaka Kito, Ryota Odaka, Kazuyoshi Takagi
IEICE Transactions on Electronics, E102-C, 7, 607, 611, 2019, refereed, Joint Work
A Fast Wire-Routing Method and an Automatic Layout Tool for RSFQ Digital Circuits Considering Wire-Length Matching
Nobutaka Kito, Kazuyoshi Takagi, and Naofumi Takagi
IEEE Transactions on Applied Superconductivity, IEEE, 1300105, 1300105, 2018, refereed, Joint Work
2017
2016
2015
2014
2013
2012
2010
J92-D, 7, 994, 1002, 2009, refereed, Joint Work
J91-D, 10, 2478, 2486, 2008, refereed, Joint Work
Error Reduction Method of an RSFQ Approximate Multiplier Using Double Operations
Shogo Kato and Nobutaka Kito
37th International Symposium on Superconductivity (ISS2024), 2024, Joint Work
Toward Electronic Design Automation for Rapid Single Flux Quantum Logic Circuits Utilizing Clockless Gates
Nobutaka Kito, Kazuyoshi Takagi, and Naofumi Takagi
17th Superconducting SFQ VLSI Workshop (SSV 2024), 2024, Joint Work
Clocked gate reduction with clockless gates in technology mapping for RSFQ logic circuits
Nobutaka Kito, Kazuyoshi Takagi, and Naofumi Takagi
2024 Applied Superconductivity Conference, Joint Work
Automatic Cell Placement for Josephson Transmission Lines in Cell-Based Layout Design Environment for RSFQ Circuits
Nobutaka Kito
36th International Symposium on Superconductivity (ISS2023), Single Work
Technology mapping with clockless gates for logic stage reduction of RSFQ logic circuits
Nobutaka Kito, Takahiro Kawaguchi, Kazuyoshi Takagi, Naofumi Takagi
Applied Superconductivity Conference 2022 (ASC 2022), 2022, Joint Work, refereed
Accuracy Improvement of Polynomial Computing RSFQ Circuits Based on Stochastic Computing by Partial Duplication
Moeka Tsuji, Nobutaka Kito
35th International Symposium on Superconductivity (ISS2022), 2022, Joint Work, refereed
Logic-depth-aware technology mapping method for RSFQ logic circuits with special RSFQ gates
Nobutaka Kito, Kazuyoshi Takagi, and Naofumi Takagi
15th European Conference on Applied Superconductivity (EUCAS2021), 2021, Joint Work
Timing Fault Simulation of Single-Flux-Quantum Logic Circuits for Fault Diagnosis
Hiroki Watanabe, Kazuyoshi Takagi, Nobutaka Kito
34th International Symposium on Superconductivity (ISS2021), 2021, Joint Work
Compact Stochastic Computing Circuits Using the Latching Function of RSFQ Circuits for Computing Polynomials
Koki Wada, Nobutaka Kito
34th International Symposium on Superconductivity (ISS2021), 2021, Joint Work
Hardware/Software Co-Design of a Monte-Carlo Tree Search based Reversi Player
Nobutaka Kito, Moeka Tsuji, and Kyouka Tomioka
23rd Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI2021), 2021, Joint Work, refereed
An RSFQ Flexible-Precision Multiplier Utilizing Bit-Level Processing
Nobutaka Kito and Kazuyoshi Takagi
33rd International Symposium on Superconductivity (ISS2020), 2020, Joint Work, refereed
Efficient Timing Fault Simulation of Rapid Single-Flux-Quantum Logic Circuits Considering the Pipelined Behavior
Shogo Nakamura, Kazuyoshi Takagi, Nobutaka Kito, and Naofumi Takagi
33rd International Symposium on Superconductivity (ISS2020), 2020, Joint Work, refereed
Logic Simulation Tool for RSFQ Circuits Accepting Arrivals of Multiple Pulses in a Clock Period
Nobutaka Kito, Shohei Udatsu, and Kazuyoshi Takagi
32nd International Symposium on Superconductivity (ISS2019), 2019, Joint Work, refereed, Kyoto, Japan
Rapid Single-Flux-Quantum Matrix Multiplication Circuit Utilizing Bit-Level Processing
Nobutaka Kito, Takuya Kumagai, and Kazuyoshi Takagi
22nd Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI 2019), 2019, Joint Work, refereed, Tainan, Taiwan
Test Pattern Generation for Timing Faults in Rapid Single-Flux-Quantum Circuits
Kazuyoshi Takagi, Mikihiro Ono, Nobutaka Kito, and Naofumi Takagi
22nd Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI 2019), 2019, Joint Work, refereed, Tainan, Taiwan
Conversion Method of Netlists Consisting of Conventional Logic Gates to RSFQ Logic Circuits Using the Characteristics of Pulse Logic
Nobutaka Kito, Kazuyoshi Takagi, and Naofumi Takagi
17th International Superconductive Electronics Conference (ISEC 2019), 2019, Joint Work, refereed, Riverside California, USA
Designs of Component Circuits for Stochastic Computing Using Rapid Single Flux Quantum Circuits
Nobutaka Kito, Yurie Koketsu, and Kazuyoshi Takagi
Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI2018), 2018, Joint Work, refereed, Matsue, Japan
A Fast Wire-Routing Method and an Automatic Layout Tool for RSFQ Digital Circuits Considering Wire-Length Matching
N. Kito, K. Takagi, and N. Takagi,
European Conference on Applied Superconductivity (EUCAS2017), 2017, Joint Work, refereed
2017
2016
2016
2015
2014
2014
2013
2013
2012
2011
2008
Joint Work
2022, Joint Work
2021, Joint Work
2020, Joint Work
2019, Joint Work
2019, Joint Work, Not refereed
2018, Joint Work
2018, Joint Work
Yurie Koketsu and Nobutaka Kito
2017, Joint Work, Not refereed
2017, Joint Work, Not refereed
2017
2016
2016
2016
2015
2015
2015
2015
2014
2014
2013
2013
2013
2012
2012
2012
2012
2011
2011
2011